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FAN6755 -- Highly Integrated Green-Mode PWM Controller
February 2010
FAN6755 Highly Integrated Green-Mode PWM Controller
Features
Internal High-Voltage Startup Low Operating Current (Maximum: 2mA) Adaptive Decreasing of PWM Frequency to 23KHz at Light-Load condition to Improve Light-Load Efficiency Frequency Hopping to Reduce EMI Emission Fixed PWM Frequency: 65KHz Internal Leading-Edge Blanking Built-in Synchronized Slope Compensation Auto-Restart Protection : Feedback Open-Loop Protection (OLP), VDD Over-Voltage Protection (OVP), Over-Temperature Protection (OTP), and Line Over-Voltage Protection Soft Gate Drive with Clamped Output Voltage: 18V VDD Under-Voltage Lockout (UVLO) Programmable Constant Power Limit (Full AC Input Range) Internal OTP Sensor with Hysteresis Build-in 5ms Soft-Start Function Input Voltage Sensing (VIN Pin) for Brown-in/out Protection with Hysteresis and Line Over-Voltage Protection
Description
This highly integrated PWM controller provides several features to enhance the performance of flyback converters. To minimize standby power consumption, a proprietary adaptive green-mode function reduces switching frequency at light-load condition. To avoid acousticnoise problems, the minimum PWM frequency is set above 23kHz. This green-mode function enables the power supply to meet international power conservation (R) requirements, such as Energy Star . With the internal high-voltage startup circuitry, the power loss caused by bleeding resistors is also eliminated. To further reduce power consumption, FAN6755 uses the BiCMOS process, which allows an operating current of only 2mA. The standby power consumption can be under 100mW for most of LCD monitor power supply designs. FAN6755 integrates a frequency-hopping function that reduces EMI emission of a power supply with minimum line filters. Its built-in synchronized slope compensation achieves a stable peak-current-mode control and improves noise immunity. The proprietary, external line compensation ensures constant output power limit over a wide AC input voltage range from 90VAC to 264VAC. FAN6755 provides many protection functions. The internal feedback open-loop protection circuit protects the power supply from open feedback loop condition or output short condition. It also has line under-voltage protection (brownout protection) and over-voltage protection using an input voltage sensing pin (VIN). FAN6755 is available in a 7-pin SOP package.
Applications
General-purpose switched-mode power supplies and flyback power converters, including: LCD Monitor Power Supply Open-Frame SMPS
Ordering Information
Part Number
FAN6755MY
Operating Temperature Range
-40 to +105C
Eco Status
Green
Package
7-Lead, Small Outline Integrated Circuit (SOIC), Depopulated JEDEC MS-112, .150 Inch Body
Packing Method
Reel & Tape
For Fairchild's definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. ENERGY STAR(R) is a registered trademark of the U.S. Department of Energy and the U.S. Environmental Protection Agency.
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Application Diagram
Figure 1.
Typical Application
Internal Block Diagram
Figure 2.
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
Functional Block Diagram
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Marking Information
7
ZXYTT 6755 TPM
1
Z: Plant Code X: 1-Digit Year Code Y: 1-Digit Week Code TT: 2-Digit Die Run Code T: Package Type (M:SOP) P: Y=Green Package M: Manufacture Flow Code
Figure 3. Top Mark
Pin Configuration
SOP-7 VIN FB SENSE GND
Figure 4.
1 2 3 4
7
HV
6 5
VDD GATE
Pin Configuration (Top View)
Pin Definitions
Pin #
1
Name
VIN
Description
Line-voltage detection. The line-voltage detection is used for brownout protection with hysteresis. Constant output power limit over universal AC input range is also achieved using this VIN pin. It is suggested to add a low-pass filter to filter out line ripple on the bulk capacitor. Pulling VIN HIGH also triggers auto-restart protection. The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is determined in response to the signal on this pin and the current-sense signal on the SENSE pin. Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle current limiting. Ground The totem-pole output driver. Soft-driving waveform is implemented for improved EMI. Power supply. The internal protection circuit disables PWM output as long as VDD exceeds the OVP trigger point. For startup, this pin is pulled HIGH to the line input or bulk capacitor via resistors.
2 3 4 5 6 7
FB SENSE GND GATE VDD HV
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
VVDD VFB VSENSE VVIN VHV PD JA TJ TSTG TL ESD DC Supply Voltage
(1, 2)
Parameter
FB Pin Input Voltage SENSE Pin Input Voltage VIN Pin Input Voltage HV Pin Input Voltage Power Dissipation (TA50C) Thermal Resistance (Junction to Air) Operating Junction Temperature Storage Temperature Range Lead Temperature (Wave Soldering or IR, 10 Seconds) Human Body Model, JEDEC: JESD22-A114 Charged Device Model, JEDEC: JESD22-C101 All Pins Except HV Pin All Pins Except HV Pin
Min.
-0.3 -0.3 -0.3
Max.
30 7.0 7.0 7.0 700 400 150
Unit
V V V V V mW C/W C C C kV
-40 -55
+125 +150 +260 4.5 1.0
Notes: 1. All voltage values, except differential voltages, are given with respect to the network ground terminal. 2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. 3. ESD with HV pin CDM=1000V and HBM=500V.
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD=15V, TA=25C, unless otherwise noted.
Symbol VDD Section
VOP VDD-ON VDD-OFF UVLO IDD-ST IDD-OP IDD-OLP VDD-OLP VDD-OVP tD-VDDOVP
Parameter
Continuously Operating Voltage Start Threshold Voltage Protection Mode Normal Mode Startup Current Operating Supply Current Internal Sink Current Threshold Voltage on VDD for HV JFET Turn-On VDD Over-Voltage Protection VDD Over-Voltage Protection Debounce Time
Conditions
Min.
Typ.
Max.
22
Units
V V V V A mA A V V s
15 9 6.8 VDD-ON - 0.16V VDD=15V, GATE Open VTH-OLP+0.1V 30 6.5 25 75
16 10 7.8
17 11 8.8 30 2
60 7.5 26 125
90 8.0 27 200
Figure 5.
VDD Behavior Continued on the following page...
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD=15V, TA=25C, unless otherwise noted.
Symbol HV Section
IHV IHV-LC
Parameter
Supply Current Drawn from HV Pin Leakage Current after Startup
Conditions
VDC=120V, VDD=10F, VDD=0V HV=700V, VDD=VDDOFF+1V
Min.
Typ.
Max.
Units
2.0
3.5 1
5.0 20
mA
A
Oscillator Section
fOSC fOSC-G tH-OP fDV fDT Frequency in Normal Mode Green-Mode Frequency Hopping Period Frequency Variation vs. VDD Deviation Frequency Variation vs. Temperature Deviation VDD=11V to 22V TA=-40 to 85C Center Frequency Hopping Range 62 4.5 20 4.20 65 5.2 23 5.05 68 5.9 26 5.90 5 5 KHz KHz ms % %
VIN Section
VIN-OFF VIN-ON VIN-Protect tVIN-Protect PWM Turn-Off Threshold Voltage PWM Turn-On Threshold Voltage PWM Protect Threshold Voltage PWM Protect Debounce Time 0.66 VIN-OFF+ 0.17 5.1 60 0.70 VIN-OFF+ 0.20 5.3 100 0.74 VIN-OFF+ 0.23 5.5 140 V V V
s
Current-Sense Section
VTH-P at VIN=1V VTH-P at VIN=3V tPD tLEB tSS Threshold Voltage for Current Limit Threshold Voltage for Current Limit Delay to Output Leading-Edge Blanking Time Period During Soft-Start Time Startup Time VIN=1V VIN=3V 0.80 0.67 0.83 0.70 100 240 4.0 290 5.5 0.86 0.73 200 340 7.0 V V ns ns ms
Figure 6.
VIN vs. VSENSE Continued on the following page...
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD=15V, TA=25C, unless otherwise noted.
Symbol
Parameter
Input Voltage to Current-Sense Attenuation Input Impedance Output High Voltage FB Open-Loop Trigger Level Delay Time of FB Pin Open-loop Protection Green-Mode Entry FB Voltage Green-Mode Ending FB Voltage FB Threshold Voltage for ZeroDuty Recovery FB Threshold Voltage for ZeroDuty ZDC Hysterisis
Conditions
Min.
Typ.
Max.
Units
Feedback Input Section
AV ZFB VFB-OPEN VFB-OLP tD-OLP VFB-N VFB-G VFB-ZDCR VFB-ZDC VFB-ZDCR VFB-ZDC 1/4.5 VFB =4V FB Pin Open 11 5.1 4.4 45.0 2.8 1/4.0 15 5.3 4.6 62.5 3.0 VFB-N - 0.6 1.6 1.4 0.12 1.8 1.6 0.15 2.0 1.8 0.19 1/3.5 18 5.5 4.8 70.0 3.2 V/V k V V ms V V V V V
PWM Frequency
fOSC
fOSC-G
VFB-ZDC VFB-ZDCR VFB-G
VFB-N
VFB
Figure 7.
VFB vs. PWM Frequency Continued on the following page...
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD=15V, TA=25C, unless otherwise noted.
Symbol GATE Section
DCYMAX VGATE-L VGATE-H tr tf IGATESOURCE
Parameter
Maximum Duty Cycle Gate Low Voltage Gate High Voltage Gate Rising Time Gate Falling Time Gate Source Current Gate Output Clamping Voltage
Conditions
Min.
60
Typ.
75
Max.
90 1.5
Units
% V V ns ns mA
VDD=15V, IO=50mA VDD=12V, IO=50mA VDD=15V, CL=1nF VDD=15V, CL=1nF VDD=15V, GATE=6V VDD=22V 8 100 30 700
VGATECLAMP_1
18
V
Over-Temperature Protection Section (OTP)
TOTP TRestart Protection Junction Temperature Restart Junction Temperature
(5) (4)
135 TOTP-25
C C
Notes: 4. When activated, the output is disabled and the latch is turned off. 5. The threshold temperature for enabling the output again and resetting the latch after over-temperature protection has been activated.
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics
Figure 8. Startup Current (IDD-ST) vs. Temperature
Figure 9. Operation Supply Current (IDD-OP) vs. Temperature
Figure 10. Start Threshold Voltage (VDD-ON) vs. Temperature
Figure 11. Minimum Operating Voltage (VDD-OFF) vs. Temperature
Figure 12. Supply Current Drawn from HV Pin (IHV) vs. Temperature
Figure 13. HV Pin Leakage Current After Startup (IHV-LC) vs. Temperature
Figure 14. Frequency in Normal Mode (fOSC) vs. Temperature
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0 9
Figure 15. Maximum Duty Cycle (DCYMAX) vs. Temperature
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics
Figure 16. FB Open-Loop Trigger Level (VFB-OLP) vs. Temperature
Figure 17. Delay Time of FB Pin Open-Loop Protection (tD-OLP) vs. Temperature
VIN-ON
VIN-OFF
Figure 18. PWM Turn-Off Threshold Voltage (VIN-OFF & VIN-ON) vs. Temperature
Figure 19. VDD Over-Voltage Protection (VDD-OVP) vs. Temperature
Figure 20. VIN vs. VLIMIT
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Functional Description
Startup Current
For startup, the HV pin is connected to the line input (1N4007 / 100K recommended) or bulk capacitor through a resistor, RHV. Startup current drawn from pin HV (typically 3.5mA) charges the hold-up capacitor through the diode and resistor. When the VDD capacitor level reaches VDD-ON, the startup current switches off. At this moment, the VDD capacitor only supplies the FAN6755 to maintain VDD before the auxiliary winding of the main transformer to provide the operating current.
Gate Output / Soft Driving
The BiCMOS output stage is a fast totem-pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 18V Zener diode to protect power MOSFET transistors against undesirable gate over voltage. A soft driving waveform is implemented to minimize EMI.
Soft Start
For many applications, it is necessary to minimize the inrush current at startup. The built-in 5.5ms soft-start circuit significantly reduces the startup current spike and output voltage overshoot.
Operating Current
Operating current is around 2mA. The low operating current enables better efficiency and reduces the requirement of VDD hold-up capacitance.
Green-Mode Operation
The proprietary green-mode function provides an offtime modulation to reduce the switching frequency in light-load and no-load conditions. The on time is limited for better abnormal or brownout protection. VFB, which is derived from the voltage feedback loop, is taken as the reference. Once VFB is lower than the threshold voltage, switching frequency is continuously decreased to the minimum green-mode frequency of around 23KHz.
Slope Compensation
The sensed voltage across the current-sense resistor is used for peak-current-mode control and pulse-by-pulse current limiting. Built-in slope compensation improves stability and prevents sub-harmonic oscillation. FAN6755 inserts a synchronized positive-going ramp at every switching cycle.
Constant Output Power Limit
For constant output power limit over universal inputvoltage range, the peak-current threshold is adjusted by the voltage of the VIN pin. Since the VIN pin is connected to the rectified AC input line voltage through the resistive divider, a higher line voltage generates a higher VIN voltage. The threshold voltage decreases as VIN increases, making the maximum output power at high-line input voltage equal to that at low-line input. The value of R-C network should not be so large that it affects the power limit (shown in Figure 21). Usually, R and C should be less than 100 and 470pF, respectively.
Current Sensing / PWM Current Limiting
Peak-current-mode control is utilized to regulate output voltage and provide pulse-by-pulse current limiting. The switch current is detected by a sense resistor into the SENSE pin. The PWM duty cycle is determined by this current sense signal and VFB, the feedback voltage. When the voltage on the SENSE pin reaches around VCOMP=(VFB-0.6)/4, a switch cycle is terminated immediately. VCOMP is internally clamped to a variable voltage around 0.83V for output power limit.
Leading-Edge Blanking (LEB)
Each time the power MOSFET is switched on, a turn-on spike occurs on the sense resistor. To avoid premature termination of the switching pulse, a leading-edge blanking time is built in. During this blanking period, the current-limit comparator is disabled and cannot switch off the gate driver.
Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at 16V and 7.8V in normal mode. During startup, the hold-up capacitor must be charged to 16V through the startup resistor to enable the IC. The hold-up capacitor continues to supply VDD before the energy can be delivered from auxiliary winding of the main transformer. VDD must not drop below 7.8V during startup. This UVLO hysteresis window ensures that the hold-up capacitor is adequate to supply VDD during startup.
Figure 21.
Current-Sense R-C Filter
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
VDD Over-Voltage Protection
VDD over-voltage protection prevents damage due to abnormal conditions. Once the VDD voltage is over the over-voltage protection voltage (VDD-OVP), and lasts for tD-VDDOVP, the PWM pulses are disabled. When the VDD voltage drops below the UVLO, PWM pulses start again. Over-voltage conditions are usually caused by open feedback loops.
Limited Power Control
The FB voltage is saturated HIGH when the power supply output voltage drops below its nominal value and shut regulator (KA431) does not draw current through the opto-coupler. This occurs when the output feedback loop is open or output is short circuited. If the FB voltage is higher than a built-in threshold for longer than tD-OLP, PWM output is turned off. As PWM output is turned off, VDD begins decreasing since no more energy is delivered from the auxiliary winding. When VDD goes below the turn-off threshold (~7.8V), the controller is totally shut down. VDD is charged up to the turn-on threshold voltage of 16V through the startup resistor until PWM output is restarted. This protection feature continues as long as the over loading condition persists. This prevents the power supply from overheating due to overloading conditions.
Brownout Protection
Since the VIN pin is connected through a resistive divider to the rectified AC input line voltage, it can also be used for brownout protection. If VIN is less than 0.7V, the PWM output is shut off. When VIN reaches over 0.9V, the PWM output is turned on again. The hysteresis window for ON/OFF is around 0.2V. The brownout voltage setting is determined by the potential divider formed with RUpper and RLower. Equations to calculate the resistors are shown below:
Noise Immunity
Noise on the current sense or control signal may cause significant pulse-width jitter, particularly in continuousconduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the FAN6755, and increasing the power MOS gate resistance improve performance.
VIN =
RLower x VAC 2 , (unit = V ) RLower + RUpper
(1)
Thermal Overload Protection
Thermal overload protection limits total power dissipation. When the junction temperature exceeds TJ= +135C, the thermal sensor signals the shutdown logic and turns off most of the internal circuitry. The thermal sensor turns internal circuitry on again after the IC's junction temperature drops by 25C. Thermal overload protection is designed to protect the FAN6755 in the event of a fault condition. For continual operation, do not exceed the absolute maximum junction temperature of TJ = +150C.
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Applications Information
R6 R7 C5 1 N1 N1A 2 C1 3 R1 L M1 N28 R2 N C2 N2 2 F1 2 BD1 CN1 1 2 3 AC IN 2 L1 C3 R3 1 4 3 N3 ZD1 C4 8 R5 N20 7 1 10 93 C6 5V1 1 L3 5V 2 P2 5V 11 4 1 N4 4 TX1 12 11 3 N17 D1 R4 N21 + C8 + C9 C10 R8 C7 N18 12V1 1 L2 12V 2 P1 12V
C11 + R14 VIN
N5 N6 6 1 D3 2 N7 2 D4
2 + C13 D5 + C14 C15
R17
R9
R13
C12 2 N8 R16 1
2
P3 SGND
N30 2 N10 D2 R11 R12 HV VIN U1 1 FB 2 3 4 C16 VIN FB SENSE GND FAN6755 SENSE HV NA VDD GATE 8 7 6 5 GATE VDD R19 1 R15 1 N9 R10
Q1
N29
3
R20 5V1 4 N12 1 U2 C18 C19 R21 C20 N15 N16 R26 A R27 3 2 R23 R24 R25 N13 R22 12V C17 R28 + 5V
U3 R18
K
N14
R
Figure 22.
44W Flyback 12V/2A, 5V/4A Application Circuit
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Build of Materials
Designator
BD1 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 D1 D2 D3 D4 D5 ZD1 F1 M1 L1 L2 L3
Part Type
BD 4A/600V YC 2200pF/Y1 YC 2200pF/Y1 XC 0.33F/300V NC YC 2200pF/Y1 CC 2200pF/100V CC 1000pF/100V EC 1000F/25V EC 470F/25V CC 100pF/50V EC 100F/400V C 1F/50V EC 1000F/10V EC 470F/10V CC 100pF/50V C 1nF/50V C 470pF/50V EC 47F/50V C 0.01F/50V C 0.1F/50V FYP1010 1N4148 FR107 FR103 FYP1010 P6KE150A FUSE 4A/250V VZ 9G 13mH Inductor (2H) Inductor (2H) Q1 R1 R2 R3
Designator
Part Type
MOS 9A/600V R 1.5M 1/4W R 1.5M 1/4W R 10M 1/4W R 47 1/4W NC R 50K 1/4W R 50K 1/4W R 0 1/8W R 47 1/8W R 100K 1/8W R 0 1/4W R 10K 1/8W R 1 1/8W R 0 1/8W R 100 1/8W R 1K 1/8W R 4.7K 1/8W R 7.5K 1/8W R 120K 1/8W R 15K 1/8W R 10K 1/8W R 0.43 2W 800H(ERL-28) IC FAN6755 IC PC817 IC TL431
R4, R5, R6, R7 R8, R17, R25, R27 R9 R10 R11 R12 R13 R14 R15 R16 R18 R19 R20 R21 R22 R23 R24 R26 R28 TX1 U1 U2 U3
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
Physical Dimensions
5.00 4.80 3.81
8 5
3.81
A
0.65TYP
B
6.20 5.80
4.00 3.80
1 4
1.75TYP
3.85 7.35
PIN ONE INDICATOR
(0.33)
1.27
0.25
M
CBA
1.27
LAND PATTERN RECOMMENDATION
0.25 0.10 1.75 MAX
C 0.10 0.51 0.33 0.50 x 45X 0.25 C
SEE DETAIL A
0.25 0.19
OPTION A - BEVEL EDGE
R0.10 R0.10
GAGE PLANE
0.36
OPTION B - NO BEVEL EDGE
NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, DATED MAY 1990 EXCEPT PIN# 7 IS REMOVED. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) STANDARD LEAD FINISH: 200 MICROINCHES / 5.08 MICRONS MIN. LEAD/TIN (SOLDER) ON COPPER. E) DRAWING FILENAME : M07AREV2
8X 0X 0.90 0.406
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
Figure 23.
7-Lead, Small Outline Package (SOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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FAN6755 -- Highly Integrated Green-Mode PWM Controller
(c) 2009 Fairchild Semiconductor Corporation FAN6755 * Rev. 1.0.0
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